A TCAD Augmented Machine Learning Based Drain Current Model for InGaAs FinFETs

In this paper, we describe a framework for model development of InGaAs FinFET based on machine learning. An artificial neural network is used to create the model, and TCAD simulation data was used to train it. The model accurately and efficiently captures changes in gate length, drain, and gate bias voltages. In order to enable circuit simulation utilizing the SPICE environment, the trained model is exported to the Verilog-A language, and circuit simulation is demonstrated.