Advanced Noise-Shaping SAR ADCs Utilizing Single-Capacitor Arbitrary-Resolution DACs for Miniaturized Neural Interfaces

This paper presents the development and validation of a high-performance Noise-Shaping (NS) Successive-Approximation-Register (SAR) Analog-to-Digital Converter (ADC) specifically tailored for low-power, high-density Implantable Neural Interfaces (INIs). The proposed design introduces a novel approach to the Digital-to-Analog Converter (DAC) formation within the NS-SAR ADC, utilizing a single capacitor to achieve arbitrarily-high resolution. It minimizes distortion due to mismatches of conventionally used capacitor banks and reduces the NS-SAR ADC area, enabling higher resolution without a proportional increase in area. Furthermore, our design addresses the challenges of kickback noise and lossy integration, improving overall performance and signal integrity during the conversion process. Simulation and experimental results substantiate the performance of the proposed noise-shaping SAR ADC. The ADC demonstrated a high peak signal-to-noise-and-distortion ratio (SNDR) of 89 dB. Moreover, it proved its robustness across different frequencies and capacitor mismatches, maintaining an SNDR of 70dB even with a 10% mismatch of the capacitors.