Statistical Characterization of ReRAM Arrays for Analog In-Memory Computing

A key challenge in developing new memories for analog in memory computing is being able to rapidly characterize statistics across a large number of analog devices. In this paper, we introduce a unique application specific integrated circuit (ASIC) designed for characterizing ReRAM statistics in a crossbar array architecture. Using this platform, a routine is developed to eliminate stuck bits and provide a 100% yield for our TaOx ReRAM memory cell. The platform allows us to characterize the noise and drift across multiple devices. We see that over five minutes the median value of the weights is highly stable changing by an average of 0.8%. Nevertheless, the standard deviation of the weights typically increases more than the median drift in the weights. Using the measured weight drift and standard deviation, we simulate the accuracy of an analog accelerator on the CIFAR-10 dataset and show that a near numeric accuracy of 91.2% (ideal numeric is 91.5%) can be achieved at t=0, but that it decreases to 88.6% by 300 seconds.