Selective Erase Operation for Multiple Strings of 3D Ferroelectric (Fe)-NAND Flash Memory

The erase operation for the multiple strings of the ferroelectric (Fe)-NAND flash memory is investigated. To achieve the selective erase operation in the Fe-NAND flash memory, the proposed scheme applied the gate induced drain leakage (GIDL) erase method of charge trap flash (CTF) memory for the inhibited strings of the unselected bit line (BL). In addition, the inhibited string of the selected BL remains in a floating state by using the program inhibit scheme of CTF memory. Leaving the unselected word lines (WLs) in a floating state reduces the electrostatic potential difference between the channel and WLs, which in turn suppresses the polarization change of the hafnium oxide (HfO2) in the inhibited memory cells. The electrostatic potential and polarization of the selected and inhibited strings and the threshold voltage ( ${V}_{\textit {th}}{)}$ of the memory cell were analyzed to confirm the success of the selective erase operation. In contrast to the block erase operation of the CTF memory, the Fe-NAND flash memory enables selective erase operation with an operation voltage lowered to 10 V.