A Drain Current Extraction Technique Using Source Parasitic Resistance and Inductance in SiC Power MOSFETs

In order to monitor the operating status of silicon carbide power
mosfet
s, an in-circuit real-time drain current extraction technique based on packaging parasitic parameters is proposed. The connection between the Kelvin source and the power source is modeled as a resistor (
R_SS
) and inductor (
L_SS
) in series. By integrating and sampling the voltage across the series combination of
R_SS
and
L_SS
as the drain current ramps up, a quadratic function can be obtained. An field programmable gate array (FPGA) is used to calculate the values of the parasitic parameters (
R_SS
and
L_SS
) and the initial drain current (
I_DS0
) in real time. Double pulse tests under different temperatures are used to verify the accuracy of the proposed technique. The test results show that the extraction accuracy of
R_SS
and
L_SS
is greater than 90% and 89%, respectively. The extraction accuracy of
I_DS0
is greater than 90% over a current range of 2.5–20 A from 25 to 175 °C. A 250 W, 155–48 V buck converter operating at 100 kHz is built and tested to demonstrate the application potential of the proposed technique.