An 8-GHz Bandwidth Push-Pull Input Buffer Based on Cascode Source Follower

This paper presents a wideband and high linearity input buffer based on a pseudo-differential complementary push-pull structure with drain bootstrapped, implemented with 28-nm CMOS process. The buffer is designed with a push-pull structure that has a wide bandwidth and low output impedance. Furthermore, the drains of the output transistors are bootstrapped to suppress channel length modulation effects. The level shifter circuits are utilized to bias the NMOS and PMOS devices of the push-pull structure, enabling them to operate in the saturation region. Due to device mismatch, a common-mode feedback circuit is used to stabilize the DC operating point for stable operation. The proposed input buffer has a power consumption of 100mW under a 1.8V power supply and demonstrates high linearity and wide bandwidth.