A look into a GraphBLAS Entry Point into an LLVM Lowering Pass, with A Precision Formatting Example

The Posits standard has shown itself to be well suited to high performance, and particularly, AI based processors as well as being a viable storage formatting alternative to IEEE754 float types. It contains an optional field in its format, the fractional bit field, which many times simply is bypassed if the number of storage bits does not allow for it. The purpose of the precision computing circuit presented here is to present a preprocessing approach to optimize processors for the storage space issues found with the implementation of the new formatting, and to show its compatibility to new offloaded memory array structures. The backbone of the compilation approach to instruction set optimization will be implementing single stage forwarding constraint, much as a carry flag is in traditional adder circuits, via a new computing pathway presented for the graphBLAS toolchain.