FPGA Implementation of Double bit Error Detection and Correction in SRAM Emulated TCAMs

Data is the term used in day-to-day life. Data is stored in memory. It can be accessed from the memory, and it can also be written into memory. Some of the memories allow writing data, such memories are called Random-Access Memory (RAM). TCAM is used for matching. These are not available on the FPGA. As FPGA is reconfigurable the SRAMs are emulated with TCAMs and used. Data gets transmitted from source to destination through a wireless communication medium. When the data is transmitted, the transmitted data gets corrupted due to errors. It eventually leads to consequences like the reading of incorrect data, hardware failure issues, system failures, etc. To overcome this, it is necessary to detect the errors, and correct them at the receiver end. Hence, in the proposed work error detection and error corrections schemes are applied at the receiver end. The aim is to detect double-bit errors by using extended hamming. Upon detecting the errors, the proposed state machine, and SEC decoder are used to correct the errors. It is implemented in Vivado design suite 2015.2 in Artix-7 FPGA.