LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell

Recently, low-bit precision quantization for DNN has been proposed to reduce both data movement and computation power [1], [2]. This approach achieves high accuracy by employing logarithmic quantization (LOGQ) for input activation or weight rather than integer quantization (INT), enabling coverage of a wide range. Within Computing-In-Memory (CIM), LOGQ ensures that only 1 bit of the bit-serial CIM input is set to ‘1’, resulting in lower power consumption. However, a physical shift alignment within the CIM is required each time to compute all CIM inputs ‘1’ to allow the accumulation of bit-wise multiplications at once. Otherwise, as in previous CIM works [3]–[5], converting exponent CIM inputs into integer data leads to extended alignment cycle latency. In [5], it reduced the latency through the double-bit cells, but this approach wastes power as the bit-line (BL) pre-charge cannot be reused.