Design and initial Measurement Results for the second revision of the High Density Digitizer System on Chip (HDSoCv2): A 64 Channel 1 GSa/s Waveform Digitizer for High Density Detectors

This paper presents the design of the second revision of a waveform sampling ASIC (HDSoC), optimized for high density light detectors, such as Silicon Photomultiplier (SiPM) or MA-PMTs, suitable for large and high rate NP experiments such as the Relativistic Heavy Ion Collider and the future Electron Ion Collider. In this paper we cover the improvement of the design, fabrication and preliminary test results for the second revision of the chip.