Hybrid Shielding: Amplifying the Power of Camouflaging and Logic Encryption

In the semiconductor industry, protecting Integrated Circuits (IC) throughout the IC supply chain has become a major concern. In-depth research has been done on logic encryption, split manufacturing, and layout camouflaging to safeguard ICs against attacks at various stages of the supply chain. In this work, we introduce a hybrid, method called Hybrid Shielding (which amplifies the power of camouflaging and logic locking) to protect ICs at each stage of the supply chain, including the foundry, the testing facility, and the end user. We take advantage of the spin-based device, called the Giant Spin-Hall Effect (GSHE) switch, multi-functionality, post-fabrication reconfigurability, and run-time polymorphism to make dynamic camouflaging resistant to SAT-based attacks and test-data mining-based attacks. These characteristics are not available to designers in CMOS. We define two metrics for circuit nodes: stability and weight. Hybrid Shielding replaces all of the selected gates with polymorphic gates. It uses a simulator to ascertain the internal state of the selected nodes. The camouflaged internal state will be used to corrupt the functionality of the primary outputs. The resulting locked circuit has high output corruption rates and is resilient to the SAT attack, Hack Test, as well as several other attacks. These results are demonstrated experimentally using standard benchmark circuits.