Abstract:
This paper proposed a method of integrating the AES encrypter and the AES decrypter into a full functional AES crypto-engine. This method can make it a very low-complexit...Show MoreMetadata
Abstract:
This paper proposed a method of integrating the AES encrypter and the AES decrypter into a full functional AES crypto-engine. This method can make it a very low-complexity architecture, especially in saving the hardware resource in implementing the AES (Inv)SubBytes module and (Inv)Mixcolumns module, etc. Most designed modules can be used for both AES encryption and decryption. Besides, the architecture can still deliver a high data rate in both encryption/decryption operations. The proposed architecture is suited for hardware-critical applications, such as smart cards, PDAs, and mobile phones, etc.
Published in: Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors
Date of Conference: 17-19 July 2002
Date Added to IEEE Xplore: 07 November 2002
Print ISBN:0-7695-1712-9
Print ISSN: 2160-0511