Nanoscale Thermal Transport in Vertical Gate- All-Around Junctionless Nanowire Transistors— Part II: Multiphysics Simulation

Today, extensive research has focused on heat propagation in emerging nanoelectronic devices. With advances in the fabrication of nanowire (NW) transistors, thermal management has become a critical issue in cooling strategies and conducting materials. In this article, we present a novel multiphysics analysis of the nanoscale thermal transport in 18-nm vertical junctionless gate-all-around (GAA) silicon NW transistors. Based on this multiphysics analysis, we developed a new computational model derived from the Guyer–Krumhansl equation (GKE) for describing heat transport within the nanoscale device. Our simulations results agree well with available theoretical approaches as well as measurement data.