A Class-E Power Amplifier with Transformer-Based Load Network in 110-nm CMOS

This paper presents a method for Class-E power amplifier (PA) design. An area-efficient output load network of only one doubly tuned (DT) transformer and a pair of capacitors is implemented thanks to DT transformer’s double peak characteristic of Zin. A design method is presented and it can be used for the design of the output load network of Class-E PA. As a proof of the method, a 12 GHz Class-E PA is designed using GlobalFoundries (GF) 110-nm CMOS process. The circuit achieves a peak power-added-efficiency (PAE) of 32.9%, a maximum saturated output power (Psat) of 17 dBm and a peak power gain of 20.8 dB. The core area of the circuit is 970 μm × 430 μm.