A Two Stage Miller OpAmp with Low Voltage Cascode Current Source with High EMI Immunity

Electromagnetic Interference (EMI) at the input of an Operational Transconductance Amplifier (OTA) leads to a DC offset voltage at the output. The amount of EMI-induced offset depends on the frequency and amplitude of the interferer signal. Various phenomena are dominant at different frequencies, such as the asymmetric slew rate is responsible for offset induced at frequencies around the Unity Gain Frequency (UGF). This paper identifies the causes and presents a design approach to optimize the slew rate and reduce the output offset without using overhead area and power. Channel length modulation of the tail current source transistor and its reduced impedance is due to the effective capacitance (CT) at the tail node becoming the culprit and adding more asymmetry to the slew rate. This is addressed using the cascode tail current source and additional gate-to-source capacitance Cgsx. Two-stage Miller OTA is designed in the standard 0.18 μm CMOS technology. Monte Carlo and the post-layout simulation results are presented to consider the parasitics, process variations, and mismatch effects.