Energy Optimization of Faulty Quantized Min-Sum LDPC Decoders

The objective of this paper is to minimize the energy consumption of a quantized Min-Sum LDPC decoder, by considering aggressive voltage downscaling of the decoder circuit. Since low power supply may introduce faults in the memories used by the decoder architecture, this paper proposes to optimize the energy consumption of the faulty Min-Sum decoder while satisfying a given performance criterion. The proposed optimization method relies on a coordinate-descent algorithm that optimizes code and decoder parameters that have a strong influence on the decoder energy consumption: codeword length, number of quantization bits, and supply voltage. Optimal parameter values are provided for several codes defined by their protographs, and significant energy gains are observed compared to non-optimized setups. Finally, further gains are obtained when the supply voltage is optimized per decoding iteration.