High-Performance and Energy-Efficient FIR Filter Architecture Using Parallel Prefix Adder-Based Triangular Common Subexpression Elimination Algorithm for IoT Enabled Wireless Sensor Network

Wireless sensor networks (WSN) generate an enormous quantity of data, which necessitates preprocessing at the source to lower the entire amount of data collected for transmission and storage. The finite impulse response (FIR) filter is extensively utilized as a signal preprocessing phase in WSNs. The triangular common subexpressions elimination framework is suggested in which the number of logical operators (LO) and logical depths (LD) in FIR filter implementations has been significantly reduced. In the presented Triangular CSE approach, the occurrences of common Triangular subexpressions are first examined across the complete set of filter coefficients. The proposed method considerably reduces the computational burden, which is again reduced by using Vertical common expressions and Horizontal common expressions. The paper includes a detailed illustration of the algorithm and compares existing algorithms. The proposed architecture minimizes the delay units, structural adders, and adder circuits in the FIR filter's multiplier blocks (MBAs) to decrease the overall complexity of the hardware. Furthermore, the design is improved using Parallel Prefix Adder Based on Kogge-Stone Tree. The LD is not increased during the reduction in LO. Energy consumption is also investigated, along with hardware expenses. Compared to other methods, the proposed solution decreases the number of structural adders while slightly increasing the number of delay elements.