Using Internal D Flip-Flops in FPGA as Alternative Memory

Field Programmable Gate Arrays (FPGAs) are used in various applications ranging from emulating older systems to modern complex digital systems by using the advantage of their very high speed and modularity. FPGAs utilize Block Random Access Memory (BRAM) and internal D flip-flops embedded within logic blocks as main memory. BRAM is used as general-purpose RAM whereas internal D flip-flops used as registers in many applications. In this study, a system is designed to utilize internal D flip-flops as general-purpose RAM. Simulation and experimental results show that internal D flip-flops are being used as general-purpose RAM successfully by using designed control system that has some important key features. One of them is the combination of address bus and data bus, which is achieved through storing address value within registers. The other one is stepping system. In this stepping system, operations are realized through a rising edge of a single bit input. It takes three steps to complete a single operation. Read and write mode is selected through a bit which is controlled from outside of the FPGA device. Depending on mode bit the read or write operation is executed on second and third step.