Mixed Signal Design of Phase Frequency Detector with Charge Pump Using 130nm PDK

This paper focuses on the design of two blocks, that is, Phase Frequency Detector (PFD) and Charge Pump (CP) both of which serve as an integral part in a Phase Locked Loop. The PFD has been designed as a digital block capable of comparing the phase and frequency of two signals to yield an output equivalent to the phase/frequency difference between the two. Charge Pump is an analog circuit which serves the purpose of converting the output signals from PFD into an analog voltage. The charge pump circuit has been designed using the Google-SkyWater 130nm open-source process design kit (PFD) whereas the PFD is a completely digital block written using Verilog hardware description language (HDL). Both these blocks are then integrated together and simulated as a mixed signal circuit to see the charging and discharging cycles of charge pump circuit depending upon the PFD input signals. The entire design has been done on the open-source eSim tool developed by FOSSEE team of IIT Bombay. Furthermore, the SPICE simulation results are presented.