Experimental Investigation of Shunt Active Power Filter for Power Quality Enhancement

This paper describes a digital approach to plan a control algorithm intended for single-phase shunt active power filter (SAPF) in regard to lessen current harmonics as well as enriching power quality. The system proposes the execution of a proportional-integral (PI) controller where real and reference dc voltage magnitudes are input to attain maximum current. Unit sine vector is realized to generate harmonic reference current and regulate DC side voltage of SAPF. An advanced digital technology, the SPARTAN 6 based field programmable gate array (FPGA) control is handled towards generation of requisite pulses meant for the Voltage Source inverter (VSI) through hysteresis current controller (HCC) method. To create the coding parameter for various components, Xilinx 14.3 software using a very high-speed integrated circuit hardware description language (VHDL) circuit is planned and correspondingly validated in an FPGA controller designing kit to obtain various waveforms by using RC load. The very large-scale integration (VLSI) implementation using Verilog HDL depicts that, the operation carried out with specified processing speed necessitates less hardware utilization and minimum execution time than other existing schemes.