Alignment through thick Si layer for high resolution patterning on bonded wafers with tight overlay margin using immersion lithography

Advanced heterogeneous integration involves the stacking of multiple devices using direct bond interconnect processes to achieve improved functionality. Typical fabrication sequences may require downstream photolithography patterning after wafer-to-wafer bonding and silicon wafer thinning. Precise alignment for this patterning process to achieve high overlay accuracy needs to be done through thick silicon layers, which is difficult due to alignment signal attenuation through silicon. To overcome this challenge, special alignment layer cavities are often printed. In this study, we have demonstrated that less than 100 nm overlay can be achieved in cavity-free processes using alignment filters available in conventional immersion lithography tools. This creates new opportunities for simplifying wafer stacking process flows in advanced packaging research.