Orthogonal Signal-Based Single-Phase FLL With Minimum Computational Overhead for Adverse Grid Conditions

In this article, a frequency-locked loop (FLL) is proposed for distorted single-phase grid systems. The proposed algorithm estimates the grid phase and frequency angle with minimal errors by using the orthogonal signal of a harmonic flag-modified second-order generalized integrator (HF-MoSOGI) and digital estimator stage. The proposed method achieves these estimates independently without using trigonometric and division operations. The implementation of the proposed FLL is straightforward and has a minimum computational overhead. The proposed algorithm, along with the detailed procedure for hardware implementation, is explained in this article. The simulation and hardware results are presented on various grid adversities to verify the proposed algorithm's improved dynamic response and effectiveness under steady grid disturbances (harmonics and dc offset). The proposed FLL is also used to implement the single-phase grid-tied inverter using hysteresis current control, and the results in simulation and hardware are reported.