0.52-mW 30-GHz LNA in 22-nm FDSOI CMOS

This brief reports a novel low-power 30GHz LNA in 22nm FDSOI CMOS technology. The LNA is based on an active network with CMOS inverting amplifier stages, and input and output feedforward impedance matching networks. It exhibits a peak gain of 11.4 dB, a noise figure of 5.8 dB, with a record power consumption of 0.52 mW from a 0.8 V supply. Owing to its circuit topology, the LNA is compact in size and its core area amounts to
$0.20\times0.22$
mm2.