Low cost external serial interface watchdog for SoCs and FPGAs automatic characterization tests

Manufacturers must characterize their design deeply when designing and producing devices like FPGAs and SoCs. Information collected through simulation and physical experiments is the primary data source for manufacturers that can then decide the optimal working ranges of multiple critical parameters such as operating voltage, frequency, temperatures, etc. With complex devices such as SoCs, and FPGAs with integrated PLLs and voltage regulators, each combination of voltage and frequency can be checked by communicating the desired parameters to the DUT, running a functional test, and observing the results. However once the ATE sends the desired parameters to the DUT through SPI or other serial interfaces, the DUT may freeze and stop to accept new commands entirely. This is particularly problematic for targeted characterization that may include a minimal number of boards and DUTs and where the ATE may simply be a simple laptop without any automatic DUT reset capabilities. This paper presents an external serial communication watchdog designed using an ESP32-based board. Our watchdog can detect the communications coming from the ATE, monitor the answers from the DUT, and restart it through power cycling in case of freezing.