Maximizing heat dissipation for burn-in testing

The correctness of a fabricated chip or integrated circuit is determined through testing. Some process defects, such as weak gate oxide, narrower interconnection metal and weak contacts, have a close relationship with the production reliability. The predominant mechanism leading to the early failure of an integrated circuit can be accelerated by operating the device or chip under test at an elevated temperature. Manufacturing burn-in testing employs this technique of subjecting the chip to high temperature stress with the purpose of screening out the early life failure to improve the quality and reliability of the manufactured chips. During burn-in testing input vectors or stress tests with the purpose of elevating the integrated circuit temperature are applied throughout the test period. Determining the vectors that would maximize heat dissipation of an integrated circuit is not a trivial problem and is NP-complete. In this paper, a genetic algorithm (GA) is used to assist in generating a sequence of input vectors that continuously tend to maximize the heat dissipated by the device under test. Variations of GA parameters were used to derive an optimal set of working parameters.