Generating Lower-Cost Garbled Circuits: Logic Synthesis Can Help

Garbled circuit (GC)-based frameworks are the cornerstone of advanced secure multi-party computation (MPC) protocols in various domains. These applications, such as secure network inference, require both scalability and real-time computation. However, the data communication among parties required by GC is currently a bottleneck of its runtime performance. Most existing works focus on minimizing the number of ANDs in logic networks over the basis {AND, XOR, NOT}, represented by XOR-AND graphs (XAG). AND is the only logic primitive among the three that contributes to providing the necessary multiplicative complexity (MC) of the desired logic function but causes communication costs. Inspired by the garbling gadget technique, we conduct a thorough study on the plausibility of adopting XAGs as the underneath logic representation to generate low-cost GCs and make two proposals: (1) merging small-fanin-size ANDs in XAGs, and (2) adopting OneHot gate, rather than AND, as the logic primitive to express MC, in order to reduce garbling costs. The first proposal optimizes GCs within a shorter runtime, whereas the second reduces garbling costs more. To validate our ideas, we propose a XAG-targeted merging algorithm and a logic synthesis flow for XOR-OneHot graphs (X1G). Compared to best-known results, our XAG- and X1Gtargeted implementations achieve reductions in garbling cost by up to 25.27% and 35.48% respectively.