Compensation of Hot Carrier Degradation Enabled by Forward Back Bias in π-GAA-π MOSFET

Forward back biasing (FBB) technique is considered as a potential solution for aging compensation in silicon on insulator (SOI) MOSFET. However, traditional SOI devices under FBB would suffer from extra off-state leakage current
$(I_{\mathrm{ off}})$
and undesirable static power consumption. In this work, we studied the hot carrier degradation and FBB compensation in
$\pi $
-GAA-
$\pi $
MOSFET. With the unique hybrid gate structure, the performance degradation is found to be less severe than pure
$\pi $
gate device; and moreover it can be partially recovered by FBB without the sacrifice of
$I_{\mathrm{ off}}$
. The presence of
$\pi $
gates offer the back gate tunability that is not provided by pure GAA gate; while the GAA gate component can effectively prevent the impact of FBB from affecting the surface potential. Our findings in
$\pi $
-GAA-
$\pi $
hybrid gate MOSFETs would be beneficial for device reliability improvement.