A 9V-Tolerant 71.4%-Efficiency Stacked-Switched-Capacitor Stimulation System with Level-Adaptive Switching Control and Rapid Stimulus-Synchronized Charge Balancing

A neural stimulation system-on-chip (SoC) plays an essential role to modulate neural activities, while requiring effective schemes to inject a desired amount of charge efficiently and safely without risk of tissue damage. Compared to the voltage or current controlled stimulation, switched-capacitor stimulation (SCS) is power efficient and ensures safe charge transfer [1], [2]. However, conventional SCS is limited to provide high-voltage (HV) compliance for various types of electrodes and disease treatments [1], [2]. HV tolerant stimulators using lowvoltage (LV) transistors still need high supply voltages to inject stimuli which is power inefficient [3], [4], so more efficient HV tolerant charge transfer scheme is highly desired. In addition, charge balancing (CB) should be preserved in HV stimulation. Among active CB schemes, pulse insertion needs additional periods after stimulation which may induce unwanted effects, and offset control suffers from slow settling time to suppress residual voltages [5], [6]. For efficient and safe HV stimulation, we presents a HV tolerant stacked-switched-capacitor stimulation (SSCS) system with rapid stimulus-synchronized CB.