Low Power CMOS GDI Full-adder Design

The paper presents the GDI based 1-bit Full adder design. Generally, adder is the most powerful as well as basic fundamental block in many digital circuits like ALU, MAC unit. So, for efficient design of the digital circuits always focused on the basic level of circuit design to minimize the power and delay. For this purpose, the paper is mainly concentrated on the adder circuit design. If we are designing adder with minimized amount power, then it will to lead the effective design of the huge digital circuit. Here, the power consumption is reduced by incorporating the GDI (Gate Diffusion Input) technique which consumes less number of transistors while comparing with the traditional methods. The overall practical implementation is done with the help of SPICE simulations. The variables such as power, delay, energy and PDP (Power Delay Products) are measured to valid the proposed design performance.