Design and Investigation of Stacked Nanosheet Transistor Parameters for Analog Performance

The work proposes a characteristic analysis of nanosheet MOSFET and also analyzed on the basis of analog application performance. A substack design for better AF performance is proposed after studying the effects of stack number and spacing on the performance of the device. Analog performance can be improved with a novel substack design, and substack spacing should be kept to a minimum. FETs display lower power consumption and low short channel effects when the gate length is extremely scaled and stacked. As a result, the proposed stacked nanosheet FET proves to be a strong contender for high frequency and low power applications at the nano-regime. The reported results show that proposed stacked nanosheet has better analog performance.