Modeling of Practical Substrate Thickness in Multilayer Printed Circuit Board for Millimeter-Wave Packaging

This article proposes modeling of the practical substrate thickness so that it is possible to accurately design by predicting the dielectric thickness that varies for each circuit of a multilayer printed circuit board (PCB) in the manufacturing process. The amount of dielectric to be filled into the empty space of the pre-stacked metal layer varies depending on the ratio of pre-stacked metal to the entire area during the high-temperature and high-pressure process, so the dielectric thickness between the inner layer and the outer layer metal varies. When the patterns are complex and nonuniform in design, the difference in the ratio of the pre-stacked metal occurs between the entire area and the partial area of the strip. For this reason, the dielectric thicknesses are manufactured differently for each circuit. Therefore, this article proposes a practical dielectric thickness equation and a reference area to calculate the copper foil residual ratio. To find the optimal reference area for calculating the copper foil residual ratio, microstrip lines with the same width and length but different ratios of the surrounding pre-stacked metal were analyzed. Finally, a dielectric thickness prediction equation is proposed and verified not only on a multilayer substrate with a thickness of
$40 \ \mu \text{m}$
but also with
$20 \ \mu \text{m}$
to show that it is a highly reliable radio frequency (RF) modeling solution.