VLSI Implementation of Triple-DES Block Cipher

More sensitive information is being exchanged over computer networks as they grow. Securing information from unauthorized parties has emerged as a critical issue in the field of information technology security. Records safety may be vital in the course of transmission or storage, and the Triple Data Encryption Standard (TDES) method with DNA Encoding and Decoding and its implementation are both designated at first, this study has developed a smart device for converting statistics into a cryptographic cipher and return the cipher to its original form, both of which are completely described with the help of various algorithms. Verilog HDL is used to implement the DNA based Triple DES design, and Modelsim 6.4c are used for analyzing it. When compared to non-pipeline methods, the proposed pipeline method is intended to increase execution speed. The Xilinx tool synthesis process is used to assess the performance of the suggested methodology. By adding a DNA encoder and decoder to the DES design, the suggested system's security is increased.