CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA

This brief presents a novel CORDIC-based approach for computing arcsine and arccosine functions. Previous approaches based on CORDIC either calculate double iterations, which increases the complexity of the stages, or have a high approximation error. By contrast, the proposed approach presents a novel compensation of the gain in the rotations that allows for an accurate computation of the arcsine and arccosine that does not increase the complexity of the stages. The proposed approach has been implemented on an FPGA to demonstrate its benefits.