31.8 A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving −85dBm/100kb/s Sensitivity, −41dB SIR and 174dB RX FoM in 22nm CMOS

Commercially viable deployment of ubiquitous ultra-low-power (ULP) radios requires ULP RX that can operate in crowded ISM environments across geographies while minimizing off-chip components for low cost and for satisfying wearable/IoT device footprints (Fig. 31.8.1). ULP RX based on envelope detectors (ED) have been proposed for
$\mu \mathrm{W}$
-power; however high-Q off-chip passives are required for passive gain and interferer tolerance necessitating a change in components with change in operating frequency [1], [2]. While mixer-first RX with uncertain IF architectures [3] provide higher linearity and interferer tolerance, implementations have required off-chip components, such as inductors for matching, filtering [3] and gain [4] or low-loss wideband hybrid couplers for noise cancellation [5], that are challenging to integrate. Additionally, ULP ED-first and LNA/mixer-first schemes rely on ED for demodulation/detection and hence, are susceptible to modulated and pulsed interferers. Two-tone signals modulated using orthogonal codes [5], [6] or frequency chirps [4] have been proposed for interferer-tolerant ED detection, demonstrating robustness to modulated blockers (Fig. 31.8.1). In this paper, we present a novel distributed N-path mixer-first noise-cancelling ULP RX for two-tone spread-spectrum BPSK signals that (i) does not require off-chip passives for matching or noise cancellation, (ii) operates over a wide LO-defined frequency range, and (iii) provides modulated-blocker tolerance. While the RX architecture can be scaled across power consumption and data-rates, 100kb/s and
$100\mu \mathrm{W}$
-scale power consumption is targeted in this work for wearable/IoT applications. The proposed distributed mixer-first scheme is implemented in 22nm FinFET CMOS leading to excellent ULP RX performance of −85dBm sensitivity for 100kb/s data-rates with
$118\mu \mathrm{W}$
power consumption
$(2\times$
to
$4\times$
figure-of-merit (FoM) improvement compared to state-of-the-art (SoA) ULP RX without signal-path off-chip passives [7], [8]) and operation across a ULP SoA frequency range of 400MHz to 950MHz.