Passive cross talk cancellation (XTC) techniques to enable system miniaturization

The accelerating demands of end-users and competing requirements of higher-bandwidth, smaller formfactor memory bus solutions require nonlinear design implementation to continue meeting the requirements of silicon architecture. Passive crosstalk and ISI compensation techniques provide a compelling means for enabling nextgeneration memory solutions as they are free or low-cost, no- or low-power, and consume minimal real estate. This document details several of the most effective techniques that can be applied on high speed memory buses, each of which yields performance improvements of one or more speed bins and can be placed modularly alongside modern equalization and active crosstalk cancellation schemes.