Spur Canceling Technique by Folded xor Gate Phase Detector and Its Application to a Millimeter-Wave SiGe BiCMOS PLL

A folded XOR gate (FXOR) phase detector (PD) is proposed for millimeter-wave (mmW) SiGe integer-
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phase-locked loops (PLLs) to relax the tradeoff between PLL loop bandwidth and reference spur rejection. With four current-reuse XOR gates jointly participated in phase detection, the reference spur generated by each XOR gate neutralizes that generated from its complementary counterpart, without degrading the phase margin or incurring extra power. The high gain of the FXOR PD suppresses its noise contribution, and the PD inherently enables frequency tracking together with lock detection. Fabricated in a 130-nm SiGe BiCMOS process, the 80-GHz mmW PLL demonstrates a −73-dBc reference spur, a minimum integrated jitter of 79.5 fs
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(10 kHz–100 MHz), and a figure of merit (FoM) of–241 dB.