An error-compensation A/D conversion technique

A method of successive-approximation analog-to-digital (A/D) conversion using switched-capacitor techniques is described. The converter consists of a comparator, two operational amplifiers, and several unit capacitors. With proper switching and charge redistribution, the error due to capacitor mismatching is compensated and the necessary voltage references are generated accurately. The converter has been realized by a 1- mu m CMOS technology. The test results indicate a monotonic 11-b converter with +or-0.9 LSB differential and +or-1.4 LSB integral nonlinearity.<>