Implementation of Aurora Interface using SFP+ Transceiver

Aurora is a lightweight serial communication protocol for multi-gigabit links that allows data to be transferred between devices using one or more Giga-bit transceivers. Aurora protocol is implemented in duplex or simplex, and Aurora TX lane or Aurora RX lane must be implemented in two devices, respectively. Data transmitted from the user application in the TX lane go through link-layer frame delineation, 64B/66B encoding, and serialization, and data received in the RX lane are transmitted to the user application through deserialization and 64B/66B decoding. In this paper, the Aurora protocol between Xilinx FPGAs is implemented using two Kintex-UltraScale+ evaluation boards. As a result, it is proved that high-speed data transmission and reception between different FPGAs is possible through the Giga-bit transceivers.