Hardware Analysis of Channel Estimation Method for IRS-Aided MIMO Wireless Systems

This paper presents hardware analysis of two practical channel estimation methods for intelligent reflecting surface (IRS)-aided communication systems. To evaluate the hardware costs, the number of required multiply-accumulation (MAC) operations of two practical channel estimation algorithms are analyzed. Regarding the hardware-level feasibility, dedicated channel estimation architecture is also implemented in 28-nm CMOS technology. Implementation results compare processing latency, area, and power consumption.