Applying Sliding Mode Control to Suppress Double Frequency Voltage Ripples in Single-phase Quasi-Z-source Inverters

The inherent double-line frequency ripple (DFR) of the single-phase quasi-Z-Source inverter (qZSI) strongly affects performance and design of the whole system, which requires hardware improvement methods such as additional semiconductor components or increasing the volume of capacitors and inductors. As a result, hardware solutions increase the price, and the volume and also reduces reliability of the system. In this paper, as a non-hardware solution, a sliding mode control (SMC) method is presented to control the voltage of the qZSI capacitor. To suppress the DFR, a second-order harmonic is injected into the capacitor reference voltage. Simulation and experimental results show that the introduced controller will have satisfactory results in reducing the DFR without any hardware changes in the qZSI, such as increasing the volume of the capacitor and inductor, adding a semiconductor, or increasing the frequency. A simulation model and experimental prototype are provided to demonstrate the validation of the effectiveness of the proposed controller.