3-Tier BSI CIS with 3D Sequential & Hybrid Bonding Enabling a1.4um pitch,106dB HDR Flicker Free Pixel

This paper demonstrates a 3-tier CMOS image sensor combining 3D Sequential Integration (3DSI) for the 2tier pixel realization & Hybrid Bonding (HB) for the logic circuitry connection. The pixel transistors are fabricated sequentially above the photogate through innovative thin SOI device technology offering scalability advantages versus its bulk counterpart. The demonstrated 3DSI pixel with dual carrier collection offers an attractive dynamic range (106dB, Single Exposure) versus pixel pitch $(1,4 \mu \mathrm{m})$ trade-off.