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IRE Transactions on Electronic Computers

Issue 2 • June 1961

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  • [Front cover]

    Publication Year: 1961, Page(s): c1
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    Freely Available from IEEE
  • IRE Professional Group on Electronic Computers

    Publication Year: 1961
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    Freely Available from IEEE
  • [Breaker page]

    Publication Year: 1961, Page(s): nil1
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  • New Editor-in-Chief of IRETEC

    Publication Year: 1961, Page(s): 149
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    Freely Available from IEEE
  • Editorial

    Publication Year: 1961, Page(s): 150
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  • A Straightforward Way of Generating All Boolean Functions of N Variables Using a Single Magnetic Circuit

    Publication Year: 1961, Page(s):151 - 156
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1705 KB)

    A correspondence has been established1 between the topology of relay contact networks and the topology of magnetic circuits, which may be applied to a relay tree to produce a magnetic structure capable of generating, in a simple manner, all Boolean functions of N variables. Once the basic magnetic topology is established, it may be distorted to achieve winding simplicity at the expense of magnetic... View full abstract»

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  • On the State Assignment Problem for Sequential Machines. I

    Publication Year: 1961, Page(s):157 - 165
    Cited by:  Papers (81)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1723 KB)

    In this paper, the problem of determining economical state assignments for finite-state sequential machines is studied. The fundamental idea in this study is to find methods for selection of these assignments in which each binary variable describing the new state depends on as few variables of the old state as possible. In general, these variable assignments in which the dependence is reduced yiel... View full abstract»

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  • A Generalization of a Theorem of Quine for Simplifying Truth Functions

    Publication Year: 1961, Page(s):165 - 168
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (736 KB)

    A method of Quine for identifying the core prime implicants of a given truth function, without obtaining all its prime implicants, is generalized under the so-called ``don't care'' conditions. It is shown that our method is equivalent to, and sometimes an improvement of, a result of Roth. When all the prime implicants (under the don't care conditions) of a truth function are given, our method beco... View full abstract»

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  • Reducing Computing Time for Synchronous Binary Division

    Publication Year: 1961, Page(s):169 - 174
    Cited by:  Papers (2)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (977 KB)

    The computing time for binary division is shortened by performing division, radix 2p on the binary operands, where p is a positive integer. Each quotient digit radix 2p is computed in almost the same time required to determine a binary quotient digit. Therefore, computing time is reduced by approximately the factor p over conventional binary division. The method is most useful for synchronous mach... View full abstract»

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  • The Philips Computer PASCAL

    Publication Year: 1961, Page(s):175 - 183
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    PASCAL is a binary parallel computer with a word length of 42 bits, a clock-pulse repetition time of 1¿ ¿sec, performing, on the average, 60,000 operations per second. Wired-in floating-point facilities are provided. Core storage is backed by a drum and by magnetic tape. There are modification versions for indexing as well as for stepping-up purposes. Special instructions include count and repea... View full abstract»

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  • Esaki Diode NOT-OR Logic Circuits

    Publication Year: 1961, Page(s):183 - 190
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2486 KB)

    A basic technique is presented which enables the development of Esaki diode NOT-OR logic circuits. Two embodiments of the basic scheme are discussed, which, when combined with an OR-DELAY circuit, provide a logically complete system. Emphasis is placed on the more economical of the two embodiments. A tolerance analysis is included, which demonstrates that the technique enables the practical design... View full abstract»

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  • Logic Circuits Using Square-Loop Magnetic Devices: A Survey

    Publication Year: 1961, Page(s):191 - 203
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2264 KB)

    The past decade has been a productive period for development in the field of large-scale digital computers. Magnetics has played an increasingly important part in these developments [1]-[8]. Magnetic cores, tapes, and drums have found almost universal acceptance for memory functions. Some future computers will undoubtedly use magnetic logic and control circuits. This survey is a capsule view of tw... View full abstract»

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  • A Bibliographical Sketch of All-Magnetic Logic Schemes

    Publication Year: 1961, Page(s):203 - 206
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1044 KB)

    An all-magnetic logic scheme is one with which a workable digital system could be constructed involving only magnetic elements, current-carrying conductors, and sources of clock pulses. Historical developments of both resistance schemes (dependent upon coupling-loop resistance) and nonresistance schemes (possessing at least first-order independence of coupling-loop resistance) are described, with ... View full abstract»

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  • Design of an All-Magnetic Computing System: Part I-Circuit Design

    Publication Year: 1961, Page(s):207 - 220
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3496 KB)

    This paper describes the circuits used in a decimal arithmetic unit which utilizes ferrite magnetic elements and copper conductors only. The arithmetic operations of addition, subtraction, and multiplication are performed with a product and sum capacity of three decimal digits. The sole logical building block of this system is a two-input inclusive-OR module with a fan-out capability of three with... View full abstract»

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  • Design of an All-Magnetic Computing System: Part II-Logical Design

    Publication Year: 1961, Page(s):221 - 232
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2467 KB)

    A logical design technique is developed for use with the particular module developed for this system. The detailed properties of this module, as well as the philosophy that led to its particular form, were covered in Part I of the paper. Briefly, the module forms the (inclusive) OR function of two input variables. This function can subsequently be transmitted to three receivers, each transfer bein... View full abstract»

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  • A 2.18-Microsecond Megabit Core Storage Unit

    Publication Year: 1961, Page(s):233 - 237
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4834 KB)

    A magnetic core memory is described which has a read-write cycle time of 2.18 ¿sec, an access time of 1 ¿sec, and a storage capacity of 1,179,648 bits. The array configuration and the design of the driving system are shown. The core and transistor requirements are discussed, and a description is given of the sensing and the driving circuitry. Design factors which governed the choice of the 3-dim... View full abstract»

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  • Matrix Switch and Drive System for a Low-Cost Magnetic-Core Memory

    Publication Year: 1961, Page(s):238 - 246
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5001 KB)

    A unique system of ferrite-core matrix switches and drivers has been developed for a low-cost magnetic-core memory. The memory uses coincident-current techniques and has a capacity of 10,000 characters with seven bits per character. A 20-¿sec read-compute-write cycle features serial-by-character processing. Approximately 7 ¿sec is computing time, and 13 ¿sec is read-write time. The matrix switc... View full abstract»

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  • Serial Matrix Storage Systems

    Publication Year: 1961, Page(s):247 - 252
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1238 KB)

    Coincident-current techniques, usually associated with parallel ferrite-core stores, may also be used for the operation of serio-parallel or purely serial memories. After outlining, in block diagram form, one possible physical realization of a serial system, the paper examines the conditions under which such a store is economically justified. The distinguishing feature of the system discussed is t... View full abstract»

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  • A Flexible and Inexpensive Method of Monitoring Program Execution in a Digital Computer

    Publication Year: 1961, Page(s):253 - 259
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1966 KB)

    A method of monitoring the program execution in a digital computer on the basis of the flow diagram of the computing program has been devised. A comparatively low-cost equipment for monitoring a maximum of 64 boxes in a flow diagram has been constructed. The monitoring method is flexible and convenient in its application. It can be used in connection with relative or symbolic addresses, compilers,... View full abstract»

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  • On the Encoding of Arbitrary Geometric Configurations

    Publication Year: 1961, Page(s):260 - 268
    Cited by:  Papers (701)  |  Patents (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1465 KB)

    A method is described which permits the encoding of arbitrary geometric configurations so as to facilitate their analysis and manipulation by means of a digital computer. It is shown that one can determine through the use of relatively simple numerical techniques whether a given arbitrary plane curve is open or closed, whether it is singly or multiply connected, and what area it encloses. Further,... View full abstract»

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  • An Accurate Analog Multiplier and Divider

    Publication Year: 1961, Page(s):269 - 272
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (651 KB)

    In the time-division multiplier the product x1·x2 is formed by pulse-duration modulation with x1 and amplitude modulation with X2. The circuit can be arranged in such a manner that division by means of a quantity x3 can be carried out simultaneously, the output being x1·x2/x3. When transistor switches are employed the error is 1·10¿4 machine units only. The zero error for X2, used for amplitud... View full abstract»

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  • High-Speed Analog-to-Digital Converters Utilizing Tunnel Diodes

    Publication Year: 1961, Page(s):273 - 284
    Cited by:  Papers (3)
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    Two analog-to-digital sequential converters have been devised which combine in one tunnel-diode pair per bit the functions of an amplitude discriminator and memory. In addition, one of the two schemes utilizes each tunnel-diode pair as a delay network. The conversion duration of one of these six-bit converters, which employs germanium 2N559 transistors and gallium arsenide 1N651 tunnel diodes, has... View full abstract»

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  • Bibliography on magnetostrictive delay lines

    Publication Year: 1961, Page(s): 285
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB)

    This Bibliography, which has been compiled from many technical publications in this country and abroad, covers a wide area in theory, design, and application. It is of interest to note that the second reference, which discusses the use of a magnetostrictive delay line in an aircraft navigation system, has served as the stimulus for almost all of the consequent research and development. The third r... View full abstract»

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  • Analysis of a Crossed-Film Cryoton Shift Register

    Publication Year: 1961, Page(s):285 - 287
    Cited by:  Papers (2)
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    First Page of the Article
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  • A Note on Optimum Pattern Recognition Systems

    Publication Year: 1961, Page(s):287 - 288
    Cited by:  Papers (1)
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    First Page of the Article
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Aims & Scope

This Transactions ceased publication in 1962. The current retitled publication is 

IEEE Transactions on Computers.

Full Aims & Scope