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IEE Proceedings E - Computers and Digital Techniques

Issue 2 • March 1984

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  • Editorial. Multiprocessors and distributed processing

    Publication Year: 1984
    IEEE is not the copyright holder of this material | PDF file iconPDF (85 KB)
    Freely Available from IEEE
  • Virtual resource ring: Technique for decentralised resource management in fault-tolerant distributed computer systems

    Publication Year: 1984, Page(s):38 - 44
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1043 KB)

    The paper first identifies design objectives for resource management in distributed computer systems. A resource-management mechanism that meets these objectives, the virtual resource ring (VRR), is then proposed and an implementation of the VRR on an actual distributed multiprocessor computer system is described. Finally, the proposed scheme is evaluated against the previously defined design obje... View full abstract»

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  • Performance measurements of scheduling strategies and parallel algorithms for a multiprocessor quick sort

    Publication Year: 1984, Page(s):45 - 54
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1254 KB)

    A variety of parallel algorithms running under a contention scheduler and a master/slave scheduler and implemented on the CYBA-M multiprocessor are described and a new predistributed quick sort is reported. Results show speed up factors of 7.88 for 13 processors, and processor utilisations greater than 75% for 10 or more processors are predicted when sorting large lists with long keys. View full abstract»

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  • Combined resource-sharing algorithm

    Publication Year: 1984, Page(s):55 - 60
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (846 KB)

    The increasing use of multiprocessor systems in a variety of circumstances has highlighted a requirement for improved co-ordination algorithms for those systems where communication is via data structures in shared memory. In this paper, two classes of algorithm are described, and their principal characteristics are discussed. A hybrid algorithm having the advantages of both classes is then propose... View full abstract»

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  • Memory interference in multimicroprocessor systems with a time-shared bus

    Publication Year: 1984, Page(s):61 - 68
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (952 KB)

    Two mathematical models are presented for the analysis of memory interference in time-shared-bus multimicroprocessor systems. The first is a discrete-time queuing model and the second is a Markov model. The measure of performance in each case is the fractional increase in execution time resulting from bus contention. Another measure, which is derived from this, is the speed up of the multiprocesso... View full abstract»

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