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IEEE Transactions on Computers

Issue 8 • Aug. 1983

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Displaying Results 1 - 21 of 21
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1983, Page(s): c1
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1983, Page(s): c2
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  • The Bottomn-Left Bin-Packing Heuristic: An Efficient Implementation

    Publication Year: 1983, Page(s):697 - 707
    Cited by:  Papers (113)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2895 KB)

    We study implementations of the bottom-left heuristic for two-dimensional bin-packing. To pack N rectangles into an infinite vertical strip of fixed width, the strategy considered here places each rectangle in turn as low as possible in the strip in a left-justified position. For reasons of simplicity and good performance, the bottom-left heuristic has long been a favorite in practical application... View full abstract»

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  • Reduction of Connections for Multibus Organization

    Publication Year: 1983, Page(s):707 - 716
    Cited by:  Papers (23)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4556 KB)

    The multibus interconnection network is an attractive solution for connecting processors and memory modules in a multiprocessor with shared memory. It provides a throughput which is intermediate between the single bus and the crossbar, with a corresponding intermediate cost. View full abstract»

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  • Stability and Performance of the R-Aloha Packet Broadcast System

    Publication Year: 1983, Page(s):717 - 726
    Cited by:  Papers (86)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2902 KB)

    The dynamic behavior of the R-ALOHA packet broadcast system with multipacket messages is analyzed in this paper. It is assumed that each user handles one message at a time and the number of packets in a message is geometrically distributed. A Markovian model of the system is first formulated which explicitly contains the influence of the propagation delay of the broadcast channel. An approximate t... View full abstract»

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  • A Parity Structure for Large Remotely Located Replicated Data Files

    Publication Year: 1983, Page(s):727 - 730
    Cited by:  Papers (25)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2021 KB)

    This paper proposes a parity structure for large remotely located replicated data files. The parity structure can accomplish the following objectives. 1) Ascertain with a high degree of confidence whether two or more files are identical, using a very small amount of communication. 2) If there is disagreement between two files, the disagreeing portion can be located simply and with a small amount o... View full abstract»

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  • Dynamic Time Warp Pattern Matching Using an Integrated Multiprocessing Array

    Publication Year: 1983, Page(s):731 - 744
    Cited by:  Papers (28)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5117 KB)

    Dynamic time warping is a well-established technique for time alignment and comparison of speech and image patterns. This paper decribes the architecture, algorithms, and design of a CMOS integrated processing array used for computing the dynamic time warp algorithm. Emphasis is placed on speech recognition applications because of the real-time constraints imposed by isolated and continuous speech... View full abstract»

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  • A Two's Complement Array Multiplier Using True Values of the Operands

    Publication Year: 1983, Page(s):745 - 747
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (460 KB)

    A new algorithm for implementing the two's complement multiplication of an m × n bit number is described. By interpreting certain positive partial product bits as negative, a parallel array is developed which has the advantage of using only one type of adder cell. A comparison with the Pezaris and Baugh-Wooley arrays is presented, showing that the new array is as fast as the Pezaris array and... View full abstract»

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  • Solution of an Open Problem on Probabilistic Grammars

    Publication Year: 1983, Page(s):748 - 750
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (626 KB)

    It has been proved that when the production probabilities of an unambiguous context-free grammar G are estimated by the relative frequencies of the corresponding productions in a sample S from the language L(G) generated by G, the expected derivation length and the expected word length of the words in L(G) are precisely equal to the mean derivation length and the mean world length of the words in ... View full abstract»

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  • Two VLSI Structures for the Discrete Fourier Transform

    Publication Year: 1983, Page(s):750 - 754
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (895 KB)

    Two VLSI structures for the computation of the discrete Fourier transform are presented. The first structure is a pipeline working concurrently on different transforms. It is shown that it matches, within a constant factor, the theoretical lower bounds for area versus data rate. The second structure is a simple modification of the first one; it works on a single transform at a time, and it matches... View full abstract»

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  • A Simplified Method to Calculate Failure Times in Fault-Tolerant Systems

    Publication Year: 1983, Page(s):754 - 756
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (596 KB)

    A simplified method is presented to calculate moments of failure time and residual lifetime of a fault-tolerant system. The method is based on recent results in queueing theory. Its effectiveness is illustrated by considering a dual repairable system from the literature. View full abstract»

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  • A VLSI Network for Variable Size FFT's

    Publication Year: 1983, Page(s):756 - 760
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (823 KB)

    A network for the evaluation of the fast Fourier transform (FFT) is presented. Such a network is able to compute, in parallel, the FFT's of arbitrary partitions in powers of two of the N input elements. It is shown that, under a VLSI model of computations, such a design requires the same asymptotical area and attains the same throughput as the corresponding network for the evaluation of a single N... View full abstract»

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  • Analysis of a Local-Area Bus System with Controlled Access

    Publication Year: 1983, Page(s):760 - 763
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (919 KB)

    The performance analysis of a local-area bus access scheme is presented, which is characterized by an alternating sequence of scheduling and data-transmission intervals. For different scheduling disciplines, viz., fixed and variable priorities, and "shortest-packet-first," we derive explicit results for the mean packet-transfer delay. Our results give insight into the question of fairness among th... View full abstract»

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  • Reservation Channel Access Protocol for High Speed Local Networks with Star Configurations

    Publication Year: 1983, Page(s):763 - 766
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (793 KB)

    In a wideband communication channel (> 100 MHz) local network, the propagation delay becomes comparable to the packet transmission time. As a result, CSMA-type protocols may not provide efficient channel utilization. A new channel access protocol, contention based channel reservation (CBCR) that is based on channel reservation is proposed in this paper. Our investigation reveals that the new ch... View full abstract»

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  • On the Load Balancing Bus Accessing Scheme

    Publication Year: 1983, Page(s):766 - 770
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (942 KB)

    We describe a new technique for accessing a shared bus in a distributed computing environment. The load balancing bus accessing scheme can be modeled by a new station type that can be incorporated in a BCMP multiple class queueing network model of the distributed system. We show one simple means of implementing the load balancing scheme. View full abstract»

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  • A Symbolic Simulator for Microprogram Development

    Publication Year: 1983, Page(s):770 - 774
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1026 KB)

    Symbolic execution can be a powerful aid for microprogram development. This note describes a symbolic microprograni simulator which is used in developing microprograms for a signal processor and gives a brief example of its use. Implementation issues and cost effectiveness of this approach are also discussed. View full abstract»

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  • A Statistical Study of the Performance of a Task Scheduling Algorithm

    Publication Year: 1983, Page(s):774 - 777
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (807 KB)

    In this note we report the results of an experimental investigation on the performance of the very simple level scheduling algorithm for unit time task systems. Although the problem of the construction of optimal k-processor schedules for unit time tasks is NP-complete, the experimental study suggests that this efficient linear time algorithm can produce optimal schedules most of the time in the s... View full abstract»

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  • Greedy Diagnosis of Hybrid Fault Situations

    Publication Year: 1983, Page(s):777 - 782
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1308 KB)

    For hybrid fault situations (that is, bounded combinations of permanent and intermittent faults) in a classical PMC diagnosable system [1], the identification of faulty units has heretofore required that testing be patiently and perhaps unrealistically repeated until the test results obtained are consistent with permanent fault situations. As a consequence, intermediate test results go unused. Mor... View full abstract»

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  • A Design for Directed Graphs with Minimum Diameter

    Publication Year: 1983, Page(s):782 - 784
    Cited by:  Papers (91)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (461 KB)

    This paper proposes a simple procedure for the design of small-diameter graphs. It can be used to construct a directed graph whose diameter is less than or equal to that of any previously proposed graph. View full abstract»

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  • IEEE Computer Society Publications

    Publication Year: 1983, Page(s): 784
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    Freely Available from IEEE
  • Compsac83

    Publication Year: 1983, Page(s): 784
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    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org