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IEEE Transactions on Electronics Packaging Manufacturing

Issue 2 • April 2005

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Displaying Results 1 - 18 of 18
  • Table of contents

    Publication Year: 2005, Page(s): c1
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  • IEEE Transactions on Electronics Packaging Manufacturing publication information

    Publication Year: 2005, Page(s): c2
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  • Reliability and wireability optimizations for chip placement on multichip modules

    Publication Year: 2005, Page(s):133 - 141
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (784 KB) | HTML iconHTML

    The chip placement problem of multichip module (MCM) designs is to map the chips properly to the chip sites on the MCM substrate. Chip placement affects not only the thermal characteristics of an MCM but also routing efficiency, which translates directly into manufacturability, performance, and cost. This paper presents a solution methodology for the optimal placement problem considering both ther... View full abstract»

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  • Static analysis of the die picking process

    Publication Year: 2005, Page(s):142 - 149
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (944 KB) | HTML iconHTML

    A numerical procedure was applied to simulate the pickup process for a die bonder to study the breakage of GaAs dice. Parameters such as needle ejecting speed, vacuum pressure, and radius of needle were investigated by the Taguchi method to obtain the manufacture process working-window in order to shorten the tuning time. It was found that the ejecting speed of the needle and the downward pressing... View full abstract»

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  • Recipe optimization and design software development of tape carrier package (TCP) inner lead bonding (ILB)

    Publication Year: 2005, Page(s):150 - 157
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1472 KB) | HTML iconHTML

    This paper proposes an optimization methodology for quickly determining a bonding recipe for the inner lead bonding (ILB) of a tape carrier package (TCP). The recipe consists of the bonding force, stage temperature, bonding time, and geometrical forming. The bonding force derivation was based on the essential relationship between the bonding force and sinking value from the referred literature. Th... View full abstract»

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  • Laser removal of molded flashes from a leadframe heatsink surface

    Publication Year: 2005, Page(s):158 - 162
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1336 KB) | HTML iconHTML

    Epoxy residues on a leadframe heatsink surface of a molded integrated circuit package are a major concern for the subsequent solder plating process. Studies using a pulsed green laser to remove the epoxy residues from precoated copper-based leadframes were carried out. Effects of the laser beam mode profile and process variables on the effectiveness of residue removal and surface morphology of the... View full abstract»

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  • Heat-resistant epoxy-silicon hybrid materials for printed wiring boards

    Publication Year: 2005, Page(s):163 - 167
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB) | HTML iconHTML

    An epoxy-silicon hybrid resin based on a new concept has been developed. This resin has a structure in which epoxy-silicon oligomers by sol-gel reaction are incorporated into the epoxy resin matrix at the nanometer level. The nanostructure was confirmed by 29Si NMR spectrum and a time-resolved energy filtering-transmission electron microscopy technique. This epoxy-silicon hybrid resin s... View full abstract»

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  • Board-level reliability of Pb-free solder joints of TSOP and various CSPs

    Publication Year: 2005, Page(s):168 - 175
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2448 KB) | HTML iconHTML

    To evaluate various Pb-free solder systems for leaded package, thin small outline packages (TSOPs) and chip scale packages (CSPs) including leadframe CSP (LFCSP), fine pitch BGA (FBGA), and wafer level CSP (WLCSP) were characterized in terms of board level and mechanical solder joint reliability. For board level solder joint reliability test of TSOPs, daisy chain samples having pure-Sn were prepar... View full abstract»

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  • An assessment of the applicability of embedded resistor trimming and rework

    Publication Year: 2005, Page(s):176 - 186
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1104 KB) | HTML iconHTML

    The successful use of embedded resistors in many applications will require that the fabricated resistors be trimmed prior to lamination into printed circuit boards to attain required design tolerances. Depending on the application, the economic value of the board being fabricated, and the process used to create the embedded resistors, it may also be prudent to consider reworking resistors that are... View full abstract»

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  • Selection of Invariant objects with a data-mining approach

    Publication Year: 2005, Page(s):187 - 196
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (824 KB) | HTML iconHTML

    An approach based on data-mining for identifying invariant objects in semiconductor applications is presented. An invariant object represents a set of parameter (feature) values of a process and the corresponding outcome, e.g., process quality. The key characteristic of an invariant object is that its outcome can be accurately predicted in the changing data environment. One of the most powerful ap... View full abstract»

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  • 7th Electronics Packaging Technology Conference (EPTC 2005)

    Publication Year: 2005, Page(s): 197
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  • 10th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm 2006)

    Publication Year: 2005, Page(s): 198
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  • ACS/MRS/IEEE CPMT Organic Microelectronics Workshop

    Publication Year: 2005, Page(s): 199
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  • Quality without compromise [advertisement]

    Publication Year: 2005, Page(s): 200
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  • IEEE Transactions on Advanced Packaging - Table of contents

    Publication Year: 2005, Page(s):201 - 202
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  • IEEE Transactions on Components and Packaging Technology - Table of contents

    Publication Year: 2005, Page(s):203 - 204
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  • IEEE Components, Packaging, and Manufacturing Technology Society Information for authors

    Publication Year: 2005, Page(s): c3
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  • IEEE Components, Packaging, and Manufacturing Technology Society Information

    Publication Year: 2005, Page(s): c4
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Aims & Scope

IEEE Transactions on Electronics Packaging Manufacturing addresses design for manufacturability, cost and process modeling, process control and automation, factory analysis and improvement, information systems, statistical methods, environmentally friendly processing, and computer-integrated manufacturing for the production of electronic assemblies and products.

 

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

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Meet Our Editors

Editor-in-Chief
R. Wayne Johnson
Auburn University