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IEEE Transactions on Electronics Packaging Manufacturing

Issue 1 • Jan. 2004

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Displaying Results 1 - 19 of 19
  • Table of contents

    Publication Year: 2004, Page(s): c1
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  • IEEE Transactions on Electronics Packaging Manufacturing publication information

    Publication Year: 2004, Page(s): c2
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  • Foreword Special Section on the IEEE International Symposiumon Electronics and the Environment (IEEE-ISEE)

    Publication Year: 2004, Page(s): 1
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  • Economic and ecological material index for end-of-life and design of electronic products

    Publication Year: 2004, Page(s):2 - 8
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2184 KB) | HTML iconHTML

    This paper presents a method to calculate economic and ecological indicators to evaluate waste regarding material recycling. As material recycling is still a preferred option for closing the loop of electric and electronic equipment (EEE), it is important to have an indicator that offers the feasibility to evaluate the benefits and burdens of different recycling routes according to the contained m... View full abstract»

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  • Eco-efficiency considerations on the end-of-life of consumer electronic products

    Publication Year: 2004, Page(s):9 - 25
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB) | HTML iconHTML

    In order to improve the eco-efficiency at the end-of-life phase of consumer electronic products, comprehensive assessments should be made. The Quotes for environmentally WEighted RecyclabiliTY and Eco-Efficiency method (QWERTY/EE) developed at the Delft University of Technology is applied to aim at minimal end-of-life treatment costs against maximal environmental recovery. In this paper, the outco... View full abstract»

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  • Case study of a printed-wire-board concerning (Re-)Design for environment

    Publication Year: 2004, Page(s):26 - 32
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (520 KB) | HTML iconHTML

    Nowadays, printed-wire-boards (PWB) appear in nearly every electronic appliance. The fast pace of technological innovation and the consequent shortening of the product lifetime lead to a rapidly growing waste stream of electronic products. Therefore, solutions regarding the end-of-life are urgently required. Our goal is to extend the lifetime of electronic products in order to decrease the environ... View full abstract»

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  • Printed circuit board recycling: a state-of-the-art survey

    Publication Year: 2004, Page(s):33 - 42
    Cited by:  Papers (44)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB) | HTML iconHTML

    This survey is done with an intention of providing a clear and comprehensive review of current practices and recent developments in the area of printed circuit board (PCB) recycling. The aim of this paper is to be a reference for research and implementation for the PCB recycling process. Original information is collected from the companies engaged in the PCB recycling industry and articles publish... View full abstract»

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  • Interfacial behavior of a flip-chip structure under thermal testing

    Publication Year: 2004, Page(s):43 - 48
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB) | HTML iconHTML

    In this paper, the interfacial behavior of a flip-chip structure under thermal testing was investigated using high sensitivity, real-time Moire interferometry. The model package studied was a sandwich structure consisting of a silicon chip, epoxy underfill and FR4 substrate. The behavior of FR4-underfill and silicon-underfill interfaces of the specimen under certain thermal loading was examined. T... View full abstract»

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  • Artificial neural networks and statistical modeling for electronic stress prediction using thermal profiling

    Publication Year: 2004, Page(s):49 - 58
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (760 KB) | HTML iconHTML

    Electronic components are constantly under stress due to factors such as signal density, temperature, humidity, and high current and voltage. Relatively little research has emphasized stress-level prediction under voltage stress. The purpose of this paper was to develop an electronic thermal profile model for stress-level prediction utilizing neural network (NN) and statistical approaches, such as... View full abstract»

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  • Defects pattern recognition for flip-chip solder joint quality inspection with laser ultrasound and Interferometer

    Publication Year: 2004, Page(s):59 - 66
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB) | HTML iconHTML

    A defects pattern recognition system has been developed for the flip-chip solder joint quality inspection by using laser ultrasound and interferometric techniques. This system extracts error ratio and dominant frequency as features from ultrasound waveforms. It also performs a cluster analysis of those feature vectors by applying probabilistic neural network classification algorithm. The system ca... View full abstract»

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  • A "defect level versus cost" system tradeoff for electronics manufacturing

    Publication Year: 2004, Page(s):67 - 76
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB) | HTML iconHTML

    Both cost and quality are important features when manufacturing today's high-performance electronics. Unfortunately, the two design goals (low) cost and (high) quality are somewhat mutually exclusive. High testing effort (and thus, quality) comes with a considerable cost, and lowering test activities has significant impact on the delivered quality. In this paper, we present a new structured search... View full abstract»

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  • Reaction of Sn-3.5Ag-0.7Cu-xSb solder with Cu metallization during reflow soldering

    Publication Year: 2004, Page(s):77 - 85
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1016 KB) | HTML iconHTML

    The influence of Sb on the growth kinetics of intermetallic compound (IMC) and chemical reaction between Sn-3.5Ag-0.7Cu-xSb (x=0, 0.2, 0.5, 1.0, 1.5, and 2.0) lead-free solder and Cu during reflow soldering is investigated in this study. Scanning electron microscope (SEM) is used to measure the thickness and grain size of the intermetallic layer and observe the microstructural evolution of solder ... View full abstract»

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  • FEM modeling of temperature distribution of a flip-chip no-flow underfill package during solder reflow process

    Publication Year: 2004, Page(s):86 - 93
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (400 KB) | HTML iconHTML

    Flip chip on organic substrate has relied on underfill to redistribute the thermomechanical stress and to enhance the solder joint reliability. However, the conventional flip-chip underfill process involves multiple process steps and has become the bottleneck of the flip-chip process. The no-flow underfill is invented to simplify the flip-chip underfill process and to reduce the packaging cost. Th... View full abstract»

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  • Leading the field since 1884 [advertisement]

    Publication Year: 2004, Page(s): 94
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  • IEEE Transactions on Advanced Packaging - table of contents

    Publication Year: 2004, Page(s):95 - 96
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  • IEEE Transactions on Components and Packaging Technology - table of contents

    Publication Year: 2004, Page(s):97 - 98
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  • IEEE copyright form

    Publication Year: 2004, Page(s):99 - 100
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  • IEEE Components, Packaging, and Manufacturing Technology Society Information for authors

    Publication Year: 2004, Page(s): c3
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  • IEEE Components, Packaging, and Manufacturing Technology Society Information

    Publication Year: 2004, Page(s): c4
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Aims & Scope

IEEE Transactions on Electronics Packaging Manufacturing addresses design for manufacturability, cost and process modeling, process control and automation, factory analysis and improvement, information systems, statistical methods, environmentally friendly processing, and computer-integrated manufacturing for the production of electronic assemblies and products.

 

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
R. Wayne Johnson
Auburn University