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Computer-Aided Engineering Journal

Issue 3 • June 1989

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Displaying Results 1 - 5 of 5
  • Hardware accelerators for CAD

    Publication Year: 1989, Page(s):77 - 81
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (489 KB)

    The article describes what hardware accelerators are, what they can do, the way that they do it, possible limitations, possible alternatives, and some factors to be taken into account when considering the purchase of one of these machines.<> View full abstract»

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  • The anatomy of hardware accelerators for VLSI circuit design

    Publication Year: 1989, Page(s):82 - 91
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1079 KB)

    With the advent of VLSI, many architectures have evolved for the viable implementation of hardware accelerators as a means of improving the performance of the CAD algorithms used in the design of VLSI circuits. These architectures, which include massively parallel machines, dataflow machines, vector processors etc., together with their application to CAD algorithms, are described.<> View full abstract»

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  • Fault simulation and test generation-an overview

    Publication Year: 1989, Page(s):92 - 98
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (684 KB)

    A design or test engineer may proudly boast 'I have a fault coverage of 96%'. What does he or she mean by that and how does it relate to yield in production or detection of system failures? The paper explains some basic concepts with regard to fault simulation and indicates the relationship between fault coverage and yield.<> View full abstract»

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  • A general purpose accelerator for digital system design

    Publication Year: 1989, Page(s):99 - 103
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (507 KB)

    With the growing acceptance of simulation tools for the analysis and verification of digital circuits, and the ever increasing complexity of digital system designs involving multiple ASICs and complex commercial VLSI components, designers are demanding increased performance from the design tools. This paper outlines the problems associated with accelerating design verification tools focused for sy... View full abstract»

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  • Hardware accelerators-meeting the RISC challenge

    Publication Year: 1989, Page(s):104 - 106
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (395 KB)

    Today's workstations offer a significant performance acceleration compared with yesterday's general purpose computers, raising the question of whether there is a role for specialised hardware accelerators. The paper discusses this issue in the context of an engine developed by the Computer Science Department at Manchester University, for routing multilayer printed circuit boards. The accelerator h... View full abstract»

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