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ICM 2000. Proceedings of the 12th International Conference on Microelectronics. (IEEE Cat. No.00EX453)

Oct. 31 2000-Nov. 2 2000

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  • ICM 2000. Proceedings of the 12th International Conference on Microelectronics. (IEEE Cat. No.00EX453)

    Publication Year: 2000
    Request permission for commercial reuse | PDF file iconPDF (619 KB)
    Freely Available from IEEE
  • FPGA implementation of a DSP core for full rate and half rate GSM vocoders

    Publication Year: 2000, Page(s):273 - 276
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (353 KB)

    Global System for Mobile (GSM) communications uses a 13 kbps vocoder which expands to 22.8 kbps after channel coding. To increase the user capacity, the half rate channel has a gross transfer rate 11.4 kbps. The vocoder for the half rate channels operates at 5.6 kbps. The computational requirements of these vocoders and other necessary services require the design of an entirely new digital signal ... View full abstract»

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  • Author index

    Publication Year: 2000, Page(s):385 - 386
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    Freely Available from IEEE
  • Behavioral test generation for VHDL processes

    Publication Year: 2000, Page(s):123 - 126
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    In this paper, two test generation algorithms for VHDL processes are presented. The first algorithm works on combinational processes, whereas the second works on sequential processes. The goal of both algorithms is testing all portions of the design by traversing all the possible paths. The VHDL subset we have considered in these algorithms covers almost 90% of ordinary designs. Our approach in th... View full abstract»

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  • Complexity analysis of the test generation for interconnection networks

    Publication Year: 2000, Page(s):117 - 122
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    This paper deals with complexity analysis of test generation in the case of interconnection networks. The generated test is under the stuck-at fault model (Feng and Wu, 1981), and the functional fault model (Eleuldj et al, 1988). The algebraic and coloration approaches are presented in order to generate test for these networks. This generation is based on sufficient conditions, which define the U-... View full abstract»

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  • The effect of gate orientation on fault detection

    Publication Year: 2000, Page(s):113 - 116
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (292 KB)

    Real defects (e.g. stuck-at or bridging faults) in VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. When a resistive (nonzero) fault model is used in fault detection, the gate orientation plays an important role. In this work, we discuss how a logically symmetrical gate may show electronically nonsymmetrical behavior and how such a property influences fault detecti... View full abstract»

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  • An efficient technique for substrate coupling parasitic extraction with application to RF/microwave spiral inductors

    Publication Year: 2000, Page(s):153 - 156
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    This paper presents an efficient modeling method based on the microstrip lines theory for the coupling between a substrate backplane and a device contact. We derive simple closed-form formulas for rapid extraction of substrate parasitics. We use these formulas to model spiral inductors as important substrate-noise sources in mixed-signal systems. The proposed model is verified for the frequencies ... View full abstract»

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  • Optical fibre-fed radio system for broadband services

    Publication Year: 2000, Page(s):291 - 298
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB)

    The use of fibre-fed millimetre-wave radio systems seems to attract attention for future broadband services, such as intelligent vehicle highway systems, high speed wireless local area networks, interactive multimedia services, and mobile broadband services. Optical fibre and millimetre-wave radio are capable of supporting the large bandwidth requirements of these systems, and on the other hand, t... View full abstract»

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  • DTMOS: its derivatives and variations, and their potential applications

    Publication Year: 2000, Page(s):9 - 10
    Cited by:  Papers (13)  |  Patents (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    Since the first introduction of dynamic threshold voltage MOSFET (DTMOS) in 1994 (Assaderaghi et al, 1994), many novel and interesting proposals have been made regarding this device. Some of the proposals have focused on improving the original design and overcoming its limitations, while others have found circuit and system applications for it. This paper briefly reviews the DTMOS concept, and its... View full abstract»

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  • Signal probability calculation in Boolean functions using graph oriented realization

    Publication Year: 2000, Page(s):29 - 32
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (308 KB)

    This paper presents a method for signal probability calculation in digital circuits, using graph-oriented realization (GOR) (Ghaznavi-Ghoushchi, 1998). It starts from BDD cutset graphs, and computes the probability by incorporating the “high”-terminated cutsets. The correlations between cutsets are accounted for. Theories and rules necessary for generalization of the method are given, ... View full abstract»

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  • Zero-overhead BIST for internal-SRAM testing

    Publication Year: 2000, Page(s):109 - 112
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    We have developed an algorithm by which to enable conventional microprocessors to test their on-chip SRAM using their existing hardware and software resources. This test method utilizes a mixture of existing memory testing techniques, which cover all important memory faults. Memory fault diagnostic capabilities are also provided. This is achieved by writing a routine called BIST program which only... View full abstract»

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  • Design and implementation of an adaptive controller for electron beam evaporation system

    Publication Year: 2000, Page(s):349 - 352
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    In this paper, design and implementation of a high accuracy alloy evaporation system is reported. The thermodynamics, modeling, identification and controller designs of the system are discussed. All the necessary hardware and software have been made and tested. The performance and accuracy of the system have been verified using RBS (Rutherford backscattering) and PIXE (particle induced X-ray emiss... View full abstract»

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  • An integrated architecture for global interconnects in a gigascale system-on-a-chip (GSoC)

    Publication Year: 2000, Page(s):149 - 152
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (420 KB)

    An integrated architecture for global interconnects in a gigascale system-on-a-chip (GSoC) is presented using models for global signal, clock, and power supply wiring networks. Based on the models for wiring resource demand, noise limit, and bandwidth requirement, an interconnect design plane is proposed View full abstract»

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  • Fabrication of SnO2-based semiconductor gas sensors for combustible and pollutant gases

    Publication Year: 2000, Page(s):317 - 320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    SnO2-based semiconductor gas sensors have been successfully fabricated and tested for detecting carbon monoxide and methane. The sensitivity and selectivity of the sensors, as two important parameters in these devices, are tailored by incorporation of different additives. While platinum enhances the sensor response to CH 4, cerium-oxide suppresses its sensitivity in favor of ... View full abstract»

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  • FPGA based-IC design for 3-phase PWM inverter with optimized space vector modulation schemes

    Publication Year: 2000, Page(s):285 - 288
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB)

    This paper presents a novel idea to integrate three of the space vector modulation (SVM) schemes, including the alternating zero sequence, the symmetric sequence and the bus clamped scheme, in a single FPGA chip which provides many advantages. Flexibility, reliability and a very compact system are obviously obtained from this designed chip. Moreover, faster design and verification time, and design... View full abstract»

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  • Challenges of CMOS scaling at below 0.1 μm

    Publication Year: 2000, Page(s):5 - 8
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    Over the last two decades, CMOS scaling has been the main driver of the electronics industry. During the last few years, the pace of scaling has been accelerating, and we are approaching some fundamental limits. In this paper, some of the key challenges of CMOS scaling, as we move into the 0.1 μm generation and beyond, are reviewed. They include challenges faced in short channel effects, gate o... View full abstract»

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  • Minimum crosstalk layer assignment in a three layer HVH channel routing based on linear pseudo Boolean optimization

    Publication Year: 2000, Page(s):25 - 28
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    Current deep-submicron VLSI technology appears to cause severe crosstalk problems, since it requires adjacent wires to be placed closer and closer together. This paper deals with a horizontal layer assignment problem for three layer HVH channel routing to minimize coupling capacitance, a main source of crosstalk. It is formulated in a 0/1 integer linear programming problem which is then solved by ... View full abstract»

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  • Fast modular neural nets for detection of human faces

    Publication Year: 2000, Page(s):223 - 226
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    In this paper, a new approach to reduce the computation time taken by neural nets for the searching process is introduced. We combine both fast and cooperative modular neural nets to enhance the detection process performance. Such an approach is applied to identify human faces automatically in cluttered scenes. In the detection phase, neural nets are used to test whether a window of 20×20 pi... View full abstract»

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  • A full differential low voltage low power high speed current comparator

    Publication Year: 2000, Page(s):103 - 106
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (192 KB)

    A full differential low-voltage, low-power, and high-speed CMOS current comparator has been designed. The circuit is implemented using 0.5 μm CMOS technology and simulated using HSPICE. The comparison is performed in just one clock cycle with a sampling rate of 600 MHz, and can sense currents down to 0.1 μA (without considering the offset). The amount of offset obtained using Monte Carlo sim... View full abstract»

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  • Design and fabrication of high accuracy GaAs Hall effect sensor grown by molecular beam epitaxy

    Publication Year: 2000, Page(s):345 - 348
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (216 KB)

    A thin GaAs Hall effect sensor with good thermal stability has been grown by molecular beam epitaxy (MBE). This sensor transduces magnetic flux to a voltage signal. The Hall effect involves passing a current through a layer of semiconductor when a magnetic field is applied perpendicularly to the surface of the layer; a voltage is developed across the sides of the semiconductor which is directly pr... View full abstract»

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  • Fabrication of InP heterostructure bipolar transistors for 40 Gb/s communication systems

    Publication Year: 2000, Page(s):133 - 136
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (328 KB)

    InP heterostructure bipolar transistors (HBT) are known for their high speed and easy integration with optical devices. Its technology is in general still developing. High frequency InP HBTs were fabricated. Some device and layer structure design improvements for 40 Gbit/s communications systems applications are suggested. The necessary conditions to manufacture the devices are presented. Various ... View full abstract»

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  • Numerical simulation of single-lithography nanoelectronic complementary bipolar circuits

    Publication Year: 2000, Page(s):161 - 164
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    This paper presents numerical 2D device-circuit simulation of nanoelectronic complementary bipolar field-effect (CBFE) circuits with potential for an ultra-high degree of integration for future ULSI. Minimum-topologic single-lithography symmetrical transistor structures (STS) with undoped or lightly-doped bases in the nanometer regime possessing good switching and amplifying properties provide for... View full abstract»

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  • Analysis and design of two types of microwave baluns

    Publication Year: 2000, Page(s):303 - 306
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB)

    Theoretical analysis and experimental realization of two types of microwave baluns is presented. Both baluns are made from coupled strip lines with one input and two output ports. The power outputs from the output ports are equal and anti-phased over a certain bandwidth. Conditions for perfect balance, at least at the center frequency, are stated and parametric sensitivity analysis is given analyt... View full abstract»

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  • Pipeline analog-to-digital converters with radix <2

    Publication Year: 2000, Page(s):39 - 42
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (308 KB)

    An analysis of the radix<2 architecture in pipeline analog-to-digital converters is conducted. Benefits and drawbacks of this method are evaluated with respect to calibration and circuit complexity. General design issues in the system and circuit level of such an ADC are reviewed. Finally, gain-stage circuitry of a radix 1.82, 3 V, 10 bit, 50 Msample/s pipeline ADC, and its simulation results i... View full abstract»

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  • A low-power multi-modulus divider in 0.6 μm digital CMOS technology

    Publication Year: 2000, Page(s):359 - 362
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB)

    A 1.4 GHz programmable divider, whose modulus can be varied from 16 to 31, is presented with improved timing of the multi-modulus divider structure and high-speed low-voltage embedded logic D-flip flop. Programmability is achieved by gating the feedback signal of the first latch of the divide-by-2 blocks. For high-speed operation, the first control stage is implemented with a simple pseudo-NMOS lo... View full abstract»

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