By Topic

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)

4-7 Aug. 2013

Filter Results

Displaying Results 1 - 25 of 367
  • Welcome to MWSCAS 2013

    Publication Year: 2013, Page(s): 1
    Request permission for commercial reuse | PDF file iconPDF (122 KB) | HTML iconHTML
    Freely Available from IEEE
  • Symposium sponsors, supporters and exhibitors

    Publication Year: 2013, Page(s):1 - 3
    Request permission for commercial reuse | PDF file iconPDF (443 KB)
    Freely Available from IEEE
  • MWSCAS 2013 organizing committee

    Publication Year: 2013, Page(s):1 - 7
    Request permission for commercial reuse | PDF file iconPDF (439 KB)
    Freely Available from IEEE
  • Past and future Midwest Symposia [1955-2014]

    Publication Year: 2013, Page(s):1 - 14
    Request permission for commercial reuse | PDF file iconPDF (200 KB)
    Freely Available from IEEE
  • Student paper contest (including presentation schedule)

    Publication Year: 2013, Page(s):1 - 2
    Request permission for commercial reuse | PDF file iconPDF (141 KB)
    Freely Available from IEEE
  • Keynotes and plenaries [6 abstracts]

    Publication Year: 2013, Page(s):1 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (342 KB)

    Provides an abstract for each of the 6 keynote and plenary presentations and a brief professional biography of each presenter. The complete presentations were not made available for publication as part of the conference proceedings. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Tutorials [6 abstracts]

    Publication Year: 2013, Page(s):1 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (189 KB)

    The tutorials cover the following aspects: Industrial Challenges of Analog Design in Deep Submicron Process Technologies; Frequency Agile Circuits for Multiband and Multimode RF Applications; Efficient Behavioral Modeling and Simulation Techniques for the Systematic Design of Analog Integrated Circuits and Systems: Application to Wireless Receivers and Sigma-Delta Converters; Power Management Circ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Table of contents

    Publication Year: 2013, Page(s):1 - 68
    Request permission for commercial reuse | PDF file iconPDF (704 KB)
    Freely Available from IEEE
  • Author index

    Publication Year: 2013, Page(s):1 - 21
    Request permission for commercial reuse | PDF file iconPDF (136 KB)
    Freely Available from IEEE
  • [Copyright notice]

    Publication Year: 2013, Page(s): 1
    Request permission for commercial reuse | PDF file iconPDF (235 KB)
    Freely Available from IEEE
  • 10-GHz current-mode 1st- and 2nd-order allpass filters on 130nm CMOS

    Publication Year: 2013, Page(s):1 - 4
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (771 KB) | HTML iconHTML

    Novel CMOS wide-bandwidth 1st- and 2nd-order current-mode allpass filters are proposed in this paper. The 1st-order filter consists of only one transistor, two resistors and one grounded inductor. An addition of one capacitor converts the 1st-order filter into a 2nd-order filter. A 1st-order allpass filter with delay of approximatel... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A 1µA bandgap-less programmable voltage regulator

    Publication Year: 2013, Page(s):5 - 8
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1480 KB) | HTML iconHTML

    A voltage regulator architecture implemented with floating-gate transistors is presented. The proposed approach substitutes the traditional bandgap voltage reference circuit and resistive feedback with analog memories. As an additional feature, charge modification of these analog memories allow for output voltage modification and circuit performance improvement after fabrication. Prototypes fabric... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A 5.3µA quiescent current fully-integrated low-dropout (LDO) regulator with Transient Recovery Time Enhancement

    Publication Year: 2013, Page(s):9 - 12
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (769 KB) | HTML iconHTML

    A new technique to decrease the transient recovery time in a very low-quiescent current low-dropout (LDO) voltage regulator is introduced. The new Transient Recovery Time Enhancement (TRTE) block comprises a voltage-to-current converter, current comparator and an NMOS output transistor. The proposed LDO using the TRTE block was fabricated in a 0.5-μm 2P3M CMOS process. The circuit operates ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Arithmetic circuits using new single-phase partially-adiabatic logic family

    Publication Year: 2013, Page(s):13 - 16
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (898 KB) | HTML iconHTML

    This paper proposes a single-phase partially-adiabatic logic family and compares its energy characteristics with other adiabatic families by simulating a full-adder (FA) and an 8-bit carry-lookahead adder (CLA). Full-adder simulation results show that the proposed family uses up to 79% less energy compared to its CMOS equivalent and up to 67% less than other adiabatic implementations. The proposed... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Sleep Convention Logic using partially slept function blocks

    Publication Year: 2013, Page(s):17 - 20
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (776 KB) | HTML iconHTML

    Sleep Convention Logic (SCL) is a self-timed pipeline style that offers inherent power-gating, resulting in ultra-low static power consumption. After each pipeline stage has processed new data, control logic asserts a sleep signal causing the entire pipeline stage to be power-gated until the next data arrives. Due to the aggregate sleep capacitance for each pipeline stage, there is an energy overh... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A low power UART design based on asynchronous techniques

    Publication Year: 2013, Page(s):21 - 24
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (667 KB) | HTML iconHTML

    Universal Asynchronous Receiver Transmitter (UART) implements serial communication between peripherals and remote embedded systems. The UART protocol is defined based on fixed frequencies with a sampling method to achieve robustness under reasonable frequency variations between systems. Such design specifications are natural for clocked domains. This work investigates whether this simple clocked h... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A power-efficient asynchronous circuit style with selective input-channel restoring

    Publication Year: 2013, Page(s):25 - 28
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (808 KB) | HTML iconHTML

    A new power efficient asynchronous circuit design is presented in this paper. By using new input channel restoring circuits and function block partitioning technique to restore only asserted input channels, the transistor area used in each asynchronous logic function unit and thus the load capacitance can be effectively minimized. As a result, the circuit power consumption can be reduced. Our simu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Low power Null Convention Logic circuit design based on DCVSL

    Publication Year: 2013, Page(s):29 - 32
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (598 KB) | HTML iconHTML

    Null convention logic units are the most important logic units in asynchronous circuits. This paper propose a new design of Null Convention Logic(NCL) design method based on the differential cascode voltage-switch logic (DCVSL). Comparisons are analyzed on delay and power consumption between the conventional NCL circuits design methods and our proposed NCL circuit deisgn method. After each single ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • High-frequency high-efficiency resonant converter with class-EM inverter and class-E rectifier

    Publication Year: 2013, Page(s):33 - 36
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1292 KB) | HTML iconHTML

    This paper proposes a resonant converter with the class-EM inverter along with its design procedure. Because the class-EM inverter is applied to the inverter part of the resonant dc/dc converter, the proposed converter achieves high power conversion efficiency at high frequencies with low cost. By using the numerical design procedure, the accurate component values for achieving multiple... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Inductor design for PWM buck converter operated as dynamic supply or amplitude modulator for RF transmitters

    Publication Year: 2013, Page(s):37 - 40
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (883 KB) | HTML iconHTML

    Pulse-width modulated (PWM) DC-DC buck converters can play a critical role in high-efficiency power management systems when operated as dynamic power supplies or amplitude modulators. However, no analysis or design methodology currently exists for a buck converter used as variable-output supply in continuous conduction mode (CCM). This paper describes a key difference in analysis and design for th... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Reverse power flow study of an isolated Quasi-Switched-Capacitor DC/DC converter for automotive applications

    Publication Year: 2013, Page(s):41 - 44
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (994 KB) | HTML iconHTML

    This paper presents the study of the reverse power flow of an isolated Quasi-Switched-Capacitor (QSC) DC/DC converter for automotive applications. The converter employs a QSC DC/AC front-stage circuit with a 3:1 voltage step-down ratio, and a synchronous-rectifying-current-doubler post-stage circuit. The reverse power flow is delivered from the 14 V dc bus to the high voltage (HV) dc bus, for the ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Analysis of the doubler of electricity considering a resistive load

    Publication Year: 2013, Page(s):45 - 48
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB) | HTML iconHTML

    This work shows a detailed analysis of an electrostatic generator based on Bennet's doubler, that can be used for vibrational energy harvesting, considering the effect of a resistive load on the behavior of the device. Two levels of approximation are used in the analysis, with results compared with precise simulations. The analyses allow a prediction of the voltage multiplication factor per cycle ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Steady-state analysis of PWM quadratic buck converter in CCM

    Publication Year: 2013, Page(s):49 - 52
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1243 KB) | HTML iconHTML

    This paper presents the analysis of a pulse-width modulated (PWM) quadratic buck or BUCK2 converter operating in continuous conduction mode (CCM). This class of converter offers very wide range of DC voltage conversion ratio enabling higher switching frequencies. In this paper, the steady-state analysis of the quadratic buck converter is presented. Results pertaining to the operation of... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • SPICE model of memristor and its application

    Publication Year: 2013, Page(s):53 - 56
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (911 KB) | HTML iconHTML

    In this paper, a circuit model of the memristor using SPICE is presented, which expands the hitherto methods to solve the memristor's modeling equations presented by HP lab. This kind of the memristor model can not only be encoded in SPICE and satisfy the properties of the general memristive systems, but also use few components and simulate fast. In order to further explore the nonlinear and switc... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A novel analytical negative resistor compact model

    Publication Year: 2013, Page(s):57 - 60
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1063 KB) | HTML iconHTML

    This paper presents the development of a compact and differentiable model for the input current-voltage (I-V) characteristics of an operational amplifier (opamp) based negative resistor element (NRE). The model is shown to have good correlation to data collected from a NRE test bench employing the μA741 opamp as the active gain element. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.