A numerical analysis of a CMOS image sensor with a simple fixed-pattern-noise-reduction technology

A 1/3-in 640/spl times/480-pixel CMOS image sensor with a simple fixed-pattern noise-reduction technology with a five-transistor pixel circuit and a low input-voltage current-voltage (I-V) converter was previously developed. In this report, we show that the low-input-voltage I-V converter with a current-mirror circuit improves the amplification factor and linearity of the pixel circuit. In a five-transistor pixel circuit, the threshold voltage of the X-Y addressing transistor affects the amplitude and the level of the readout pulse. An analysis of the mechanism of the X-Y addressing transistor shows the basic concept behind the selection of the threshold voltage. An L-shaped readout gate for a pinned photodiode is compared with a straight readout gate, and is proved to be adequate for rapid charge transfer.